|
•
| 128-byte deep FIFO per transmitter and receiver |
|
•
| Automated in-band software flow control using programmable Xon/Xoff in both directions |
|
•
| Automated out-of-band flow control using CTS/RTS and DSR/DTR |
|
•
| Compliant with PCI Express base specifications revision 1.0a |
|
•
| Four high speed RS-232 serial ports with data transfer rate up to 460.8 Kbps |
|
•
| Native single-Chip, single lane PCI Express |
|
•
| Single chip design optimizes speed and reliability |
